Computers include general purpose central processing units (CPUs) that are designed to execute a specific set of system instructions. A group of processors that have similar architecture or design specifications may be considered to be members of the same processor family. Examples of current processor families include the Motorola 680X0 processor family, manufactured by Motorola, Inc. of Phoenix, Ariz.; the Intel 80X86 processor family, manufactured by Intel Corporation of Sunnyvale, Calif.; and the PowerPC processor family, which is manufactured by Motorola, Inc. and used in computers manufactured by Apple Computer, Inc. of Cupertino, Calif. Although a group of processors may be in the same family because of their similar architecture and design considerations, processors may vary widely within a family according to their clock speed and other performance parameters.
Each family of microprocessors executes instructions that are unique to the processor family. The collective set of instructions that a processor or family of processors can execute is known as the processor's instruction set. As an example, the instruction set used by the Intel 80X86 processor family is incompatible with the instruction set used by the PowerPC processor family. The Intel 80X86 instruction set is based on the Complex Instruction Set Computer (CISC) format. The Motorola PowerPC instruction set is based on the Reduced Instruction Set Computer (RISC) format. CISC processors use a large number of instructions, some of which can perform rather complicated functions, but which require generally many clock cycles to execute. RISC processors use a smaller number of available instructions to perform a simpler set of functions that are executed at a much higher rate.
The uniqueness of the processor family among computer systems also typically results in incompatibility among the other elements of hardware architecture of the computer systems. A computer system manufactured with a processor from the Intel 80X86 processor family will have a hardware architecture that is different from the hardware architecture of a computer system manufactured with a processor from the PowerPC processor family. Because of the uniqueness of the processor instruction set and a computer system's hardware architecture, application software programs are typically written to run on a particular computer system running a particular operating system.
Computer manufacturers want to maximize their market share by having more rather than fewer applications run on the microprocessor family associated with the computer manufacturers' product line. To expand the number of operating systems and application programs that can run on a computer system, a field of technology has developed in which a given computer having one type of CPU, called a host, will include an emulator program that allows the host computer to emulate the instructions of an unrelated type of CPU, called a guest. Thus, the host computer will execute an application that will cause one or more host instructions to be called in response to a given guest instruction. Thus the host computer can both run software design for its own hardware architecture and software written for computers having an unrelated hardware architecture. As a more specific example, a computer system manufactured by Apple Computer, for example, may run operating systems and program written for PC-based computer systems. It may also be possible to use an emulator program to operate concurrently on a single CPU multiple incompatible operating systems. In this arrangement, although each operating system is incompatible with the other, an emulator program can host one of the two operating systems, allowing the otherwise incompatible operating systems to run concurrently on the same computer system.
When a guest computer system is emulated on a host computer system, the guest computer system is said to be a “virtual machine” as the guest computer system only exists in the host computer system as a pure software representation of the operation of one specific hardware architecture. The terms emulator, virtual machine, and processor emulation are sometimes used interchangeably to denote the ability to mimic or emulate the hardware architecture of an entire computer system. As an example, the Virtual PC software created by Connectix Corporation of San Mateo, Calif. emulates an entire computer that includes an Intel 80X86 Pentium processor and various motherboard components and cards. The operation of these components is emulated in the virtual machine that is being run on the host machine. An emulator program executing on the operating system software and hardware architecture of the host computer, such as a computer system having a PowerPC processor, mimics the operation of the entire guest computer system.
The emulator program acts as the interchange between the hardware architecture of the host machine and the instructions transmitted by the software running within the emulated environment. This emulator program may be a host operating system (HOS), which is an operating system running directly on the physical computer hardware. Alternately, the emulated environment might also be a virtual machine monitor (VMM) which is a software layer that runs directly above the hardware and which virtualizes all the resources of the machine by exposing interfaces that are the same as the hardware the VMM is virtualizing (which enables the VMM to go unnoticed by operating system layers running above it). A host operating system and a VMM may run side-by-side on the same physical hardware.
In “real” physical/non-virtual computing environments, computing systems exist that include multiple physical processors within the computer hardware. Generally, the initial state of a multi-processor system is such that one processor serves as a “starter processor” that transmits startup messages to each of the other processors present in the system. More specifically, coded in the BIOS or the OS, communication to a local advanced programmable interrupt controller (APIC) device occurs to direct startup messages from the starter processor to each of the processors present. (A local APIC device handles interrupts from and for multiple processors.) Initially there is a master-slave relationship between the starter processor and all other processors, but once all processors are started, the processors run at a peer level. The mechanism for starting a processor is very loosely defined in the x86 architecture. There is a message to start a processor, but there is no defined architectural means to indicate to the starter processor whether the target processor is successfully started. Given this, the conventional mechanism that is used for determining whether the target processor is successfully started is the basic input/output system (BIOS), which is the very first piece of software which runs when a computer is switched on. To begin, BIOS code executing on the starter processor issues a start message to another processor, known as the target processor, indicating at which shared memory location it should begin startup program execution. Then, execution of startup program code that is left in shared memory is begun by the target processor, and the target processor sets a flag. The OS of the starter processor looks for a change in that location in memory. When the BIOS code of the starter processor detects that the shared memory location has changed, it knows that the target processor has started. The only indication to the starter BIOS code that the target processor did not start is when the code does not detect a change in memory location within a limited amount of time and, thus, assumes that there is a problem with the processor and, therefore, it is not available. This timeout period is short—a few milliseconds.
Currently, most VMs generally use a single virtual processor (VP), but a multi-processor VM (MPVM) may be desirable. In a VM environment, one way to initialize multiple VPs is for the VMM to create emulate multiple VPs is through multiple threads of execution on the host computer system. However, because these VPs correspond to separate threads of execution in the host environment, and because there may be multiple VMs in a system vying for limited system resources, the execution time for a thread that represents a VP is arbitrary because of time-slicing. Therefore, upon initialization, it is expected that a given VP may not start immediately. However, the guest operating system (and, more specifically, the BIOS that are part of an operating system) were developed on the presumption that it would be executing on physical hardware with real multiple processors and a very quick startup time for a real processor, and thus the guest OS provides only a small finite amount of real time for an initialized processor to actually start before timing out which is adequate for real processor hardware. However, this is somewhat problematic in a virtualized environment since initialization and startup of a VP may take several milliseconds (due to thread executing and such) and, in fact, the time it takes to start a VP will almost always exceed the timeout of the guest OS. One simple and direct way to handle the timeout problem is to modify the BIOS of the guest OS in order to lengthen the timeout, but this solution requires that all guest OSs be maintained (i.e., their timeouts all have to be modified), and this in turn comprises one of the benefits of a VM—that is, the ability to run an off-the-shelf operating system (presumably developed for real hardware). Moreover, the need to do this maintenance—such as on a case-by-case and OS-by-OS basis—is also problematic because of the risk of failure if the maintenance is not applied properly. Therefore, what is needed is a way to initialize multiple VPs in a VM environment without timing out and without the need to modify and maintain each guest OS and/or its associated components, such as the BIOS.